Astera Labs

Principal Product Application Engineer - PCIe

Astera Labs · San Jose, CA
San Jose, CA $170K–$220K Posted 2026-07-17
Salary
$170K–$220K
Type
Full-time
Experience
8+ yr

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com .

Role Overview

Astera Labs is seeking a Principal Product Applications Engineer to join our Aries PCIe Retimer team and serve as a critical technical bridge between our customers and engineering organization. As AI infrastructure demands explode, our Aries Smart Retimers are enabling the high-speed, low-latency PCIe connectivity that powers the world's most advanced data centers—and you'll be at the center of that growth.

In this high-impact role, you'll work directly with hyperscalers, OEMs, and system builders to drive successful adoption of our Aries PCIe products. You'll combine deep technical expertise with customer-facing skills to solve complex system-level challenges, create compelling technical documentation, and influence product direction based on real-world customer needs. This is an opportunity to shape how next-generation AI and cloud infrastructure connects and scales.

You'll collaborate cross-functionally with design engineering, validation, sales, and marketing teams while building strong relationships with customers who are defining the future of computing. If you thrive at the intersection of cutting-edge silicon and customer success, this role offers exceptional visibility and impact.

Key Responsibilities

Customer Technical Engagement

  • Serve as the primary technical resource for customers during pre-sales evaluation and post-sales deployment of Aries PCIe retimers
  • Deliver technical presentations, product training, and demonstrations to customer engineering teams
  • Build trusted advisor relationships with key accounts and drive product adoption

System-Level Debug & Validation Support

  • Lead root cause analysis and debugging of complex PCIe signal integrity and protocol issues in customer systems
  • Support customer lab bring-up, characterization, and validation activities
  • Develop and execute test plans to reproduce and resolve customer-reported issues

Technical Documentation & Enablement

  • Create application notes, reference designs, and best practices guides for PCIe system implementation
  • Develop collateral that accelerates customer time-to-deployment
  • Contribute to product documentation including datasheets and user guides

Cross-Functional Collaboration

  • Partner with product management and engineering to translate customer feedback into product requirements
  • Support sales teams with technical expertise during customer engagements
  • Represent the voice of the customer in internal roadmap and feature discussions

Basic Qualifications

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or related field
  • 8+ years of experience in applications engineering, technical support, or system engineering roles
  • Strong understanding of PCIe architecture, protocol, and electrical specifications (Gen4/Gen5/Gen6)
  • Hands-on experience with lab equipment including oscilloscopes, protocol analyzers, and BERT tools
  • Experience debugging high-speed serial interfaces at both the physical and protocol layers
  • Excellent written and verbal communication skills with ability to explain complex technical concepts
  • Develop and modify firmware using C to implement features, optimize performance, and resolve technical issues
  • Travel to customer sites worldwide to provide on-site technical support, conduct system integration, and drive issue resolution

Preferred Qualifications

  • Experience with PCIe retimers, redrivers, or similar connectivity components
  • Familiarity with server, storage, or GPU system architectures
  • Background in signal integrity analysis and simulation tools
  • Scripting proficiency (Python, TCL) for test automation and data analysis
  • Prior experience working directly with hyperscale or enterprise data center customers
  • Track record of creating high-quality technical documentation and application notes

Salary range is $170,500 to $220,000 depending on experience, level, and business need. This role may be eligible for discretionary bonus, incentives and benefits.

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

Python
$110K — 10th pctl $260K — 90th pctl
This role’s midpoint $195K vs. market median $180K for Engineering roles
+10%
above median
Based on 17,000+ Engineering roles with disclosed salary ranges tracked on NewJob.
Astera Labs

Astera Labs

Semiconductors · Public · San Jose, USA

Stage & Valuation
Public · $62.9B
Open roles on NewJob
Most hiring in
Engineering (93) · BizOps (5) · Operations (4)
Astera Labs designs and manufactures semiconductor-based connectivity solutions for cloud and AI infrastructure. Their products include intelligent connectivity platforms and software to optimize resources for large fleets at cloud-scale.
Semiconductors AI Infrastructure Cloud Computing
E
Senior Director System Validation Engineer
San Jose, CA
Engineering
$240K–$300K
M
Sr. Director of Product Marketing
San Jose, CA
Marketing
$240K–$300K
B
Technical Chief of Staff for ASIC Engineering
San Jose, CA
BizOps
$216K–$300K
See all 140+ roles at Astera Labs →
F
Principal Engineer — Product & Application Security
Freshworks San Mateo, CA
Engineering
$241K–$298K
A
Senior Software Engineer - Product Engineering
Abnormal AI San Francisco, CA Hybrid
Engineering
$179K–$258K
A
Product Engineer - AI
Alma Palo Alto, CA
Engineering
$150K–$300K
A
Staff+ Application Security Engineer - M&A
Anthropic Remote-Friendly (Travel-Required) Remote
Engineering
$320K–$485K
See all Engineering roles →

Interested in this role?

Apply directly on the company site — no recruiter middleman, no account required.

Apply now →
Apply on company site