Applications are closed for this role. It was originally posted 2025-12-12. It’s no longer accepting applicants — see roles FuriosaAI is still hiring for →, or browse the live openings below.
About this role
RESPONSIBILITIES
- Design High-Speed Interface Controller IP
- Test, Performance analysis in IP/chiptop level (bus, memory bandwidth) simulation
- Test, Debugging & Troubleshooting of Silicon
MINIMUM QUALIFICATIONS
- Good knowledge and understanding in Interface protocol (e.g bus or high-speed interface with flow control, retransmission scheme, etc.)
- Experience in RTL design and logic synthesis, verification, timing closure
- Good knowledge and experience of buffer, CDC design required for Interface Design.
PREFERRED QUALIFICATIONS
- Excellent understanding in High-Speed Interface standard specifications (e.g PCIe, LPDDR, HBM, Ethernet or UCIe, etc.)
- High understanding of High-Speed interface technology e.g. SERDES, Channel encoding, OSI-7 layer, Equalization, etc.
CONTACT